CY7C1061DV33-10ZSXI 存储器

CY7C1061DV33-10ZSXI

静态随机存取存储器 16Mb 10ns 3.3V 1Mx16 Fast Async

16-Mbit (1M × 16) Static RAM

Functional Description CY7C1061DV33-10ZSXI

The CY7C1061DV33 is a high performance CMOS Static RAM organized as 1,048,576 words by 16 bits.

To write to the device, take Chip Enables (CE1 LOW and CE2 HIGH) and Write Enable (WE) input LOW. If Byte Low Enable (BLE) is LOW, then data from I/O pins (I/O0 through I/O7), is written into the location specified on the address pins (A0 through A19). If Byte High Enable (BHE) is LOW, then data from I/O pins (I/O8 through I/O15) is written into the location specified on the address pins (A0 through A19).

To read from the device, take Chip Enables (CE1 LOW and CE2  HIGH) and Output Enable (OE) LOW while forcing the Write  Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data  from the memory location specified by the address pins appears  on I/O0 to I/O7. If Byte High Enable (BHE) is LOW, then data from  memory appears on I/O8 to I/O15. See Truth Table on page 12  for a complete description of Read and Write modes.

Features CY7C1061DV33-10ZSXI

■ High speed

❐ tAA = 10 ns

■ Low active power

❐ ICC = 175 mA at 100 MHz

■ Low CMOS standby power

❐ ISB2 = 25 mA

■ Operating voltages of 3.3 ± 0.3 V

■ 2.0 V data retention

■ Automatic power down when deselected

■ TTL compatible inputs and outputs

■ Easy memory expansion with CE1 and CE2 features

■ Available in Pb-free 54-pin TSOP II and 48-ball VFBGA

packages

■ Offered in single CE and dual CE options