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IS45S16160J-6TLA1
动态随机存取存储器 SYNC. 动态随机存取存储器 256Mb 16M x16, Automotive
32Meg x 8, 16Meg x16 256Mb SYNCHRONOUS DRAM
OVERVIEW IS45S16160J-6TLA1
ISSI's 256Mb Synchronous DRAM achieves high-speed data transfer using pipeline architecture. All inputs and outputs signals refer to the rising edge of the clock input. The 256Mb SDRAM is organized as follows.
FEATURES IS45S16160J-6TLA1
• Clock frequency: 166, 143, 133 MHz
• Fully synchronous; all signals referenced to a
positive clock edge
• Internal bank for hiding row access/precharge
• Single Power supply: 3.3V + 0.3V
• LVTTL interface
• Programmable burst length
– (1, 2, 4, 8, full page)
• Programmable burst sequence:
Sequential/Interleave
• Auto Refresh (CBR)
• Self Refresh
• 8K refresh cycles every 32 ms (A2 grade) or
64 ms (commercial, industrial, A1 grade)
• Random column address every clock cycle
• Programmable CAS latency (2, 3 clocks)
• Burst read/write and burst read/single write
operations capability
• Burst termination by burst stop and precharge command
OPTIONS IS45S16160J-6TLA1
• Package:
54-pin TSOP-II
54-ball BGA
• Operating Temperature Range:
Commercial (0oC to +70oC)
Industrial (-40oC to +85oC)
16 M x 16
16 bit
256 Mbit
166 MHz
6 ns
108