MT48LC16M16A2P-6A IT:G TR 全新原装 DDR

MT48LC16M16A2P-6A IT:G TR 全新原装  DDR

? PC100- and PC133-compliant

? Fully synchronous; all signals registered on positive edge of system clock

? Internal, pipelined operation; column address ca be changed every clock cycle

? Internal banks for hiding row access/precharge

? Programmable burst lengths: 1, 2, 4, 8, or full page

? Auto precharge, includes concurrent auto precharge and auto refresh modes

? Self refresh mode (not available on AT devices)

? Auto refresh

– 64ms, 8192-cycle refresh (commercial and industrial)

– 16ms, 8192-cycle refresh (automotive)

? LVTTL-compatible inputs and outputs

? Single 3.3V ±0.3V power supply

优势出，有需要的欢迎联系

MT29F64G08CBABAWP固带 10K 23+

KLM8G1GETF-B041 10K 23+

KLMBG2JETD-B041 10K 23+

KLMAG1JETD-B041 10K 23+

K4E6E304EC-EGCG 10K 23+

K4B4G1646E-BCNB 10K 23+

K4F6E3S4HM-MGCJ 10K 23+

K4AAG165WA-BCWE 10K 23+

K4B4G0846E-BCNB 10K 23+

H5TC4G83BFR-PBA 95 17+

H26M41204HPR 5 20+

SDTNRGAMA-008G 35 21+

K4UBE3D4AA-MGCL 10K 23+

K4UBE3D4AB-MGCL 10K 23+

K4U6E3S4AA-MGCR 10K 23+