TMS320F28067PZT TI LQFP-100 进口原装 32位微控制器 MCU

High-efficiency 32-bit CPU (TMS320C28x)
– 90 MHz (11.11-ns cycle time)
– 16 × 16 and 32 × 32 Multiply and Accumulate
(MAC) operations
– 16 × 16 dual MAC
– Harvard bus architecture
– Atomic operations
– Fast interrupt response and processing
– Unified memory programming model
– Code-efficient (in C/C++ and Assembly)
• Floating-Point Unit (FPU)
– Native single-precision floating-point operations
• Programmable Control Law Accelerator (CLA)
– 32-bit floating-point math accelerator
– Executes code independently of the main CPU
• Viterbi, Complex Math, CRC Unit (VCU)
– Extends C28x instruction set to support complex
multiply, Viterbi operations, and Cyclic
Redundency Check (CRC)
• Embedded memory
– Up to 256KB of flash
– Up to 100KB of RAM
– 2KB of One-Time Programmable (OTP) ROM
• 6-channel Direct Memory Access (DMA)
• Low device and system cost
– Single 3.3-V supply
– No power sequencing requirement
– Integrated power-on reset and brownout reset
– Low-power operating modes
– No analog support pin
• Endianness: Little endian
• JTAG boundary scan support
– IEEE Standard 1149.1-1990 Standard Test
Access Port and Boundary Scan Architecture