LCMXO3LF-4300C-5BG256I FPGA

LCMXO3LF-4300C-5BG256I

FPGA - 现场可编程门阵列 4320 LUTs

Introduction LCMXO3LF-4300C-5BG256I

MachXO3™ device family is an Ultra-Low Density

family that supports the most advanced programmable

bridging and I/O expansion. It has the breakthrough

I/O density and the lowest cost per I/O. The device I/O

features have the integrated support for latest industry

standard I/O.

Features LCMXO3LF-4300C-5BG256I

1.1.1. Solutions

 Smallest footprint, lowest power, high data

throughput bridging solutions for mobile

applications

 Optimized footprint, logic density, I/O count, I/O

performance devices for I/O management and

logic applications

 High I/O logic, lowest cost I/O, high I/O devices for

I/O expansion applications

1.1.2. Flexible Architecture LCMXO3LF-4300C-5BG256I

 Logic Density ranging from 64 to 9.4K LUT4

 High I/O to LUT ratio with up to 384 I/O pins

1.1.3. Advanced Packaging

 0.4 mm pitch: 1K to 4K densities in very small

footprint WLCSP (2.5 mm × 2.5 mm to 3.8 mm ×

3.8 mm) with 28 to 63 I/Os

 0.5 mm pitch: 640 to 9.4K LUT densities in 6 mm x

6 mm to 10 mm x 10 mm BGA packages with up to

281 I/Os

 0.8 mm pitch: 1K to 9.4K densities with up to 384

I/Os in BGA packages

1.1.4. Pre-Engineered Source Synchronous I/O

 DDR registers in I/O cells

 Dedicated gearing logic

 7:1 Gearing for Display I/Os

 Generic DDR, DDRx2, DDRx4