MC74HC595ADR2G 计数器移位寄存器 ON

MC74HC595ADR2G

计数器移位寄存器 8-Bit 3 State Shift

8-Bit Serial-Input/Serial or  Parallel-Output Shift  Register with Latched  3-State Outputs  

High−Performance Silicon−Gate CMOS

MC74HC595ADR2G Features

• Output Drive Capability: 15 LSTTL Loads

• Outputs Directly Interface to CMOS, NMOS, and TTL

• Operating Voltage Range: 2.0 to 6.0 V

• Low Input Current: 1.0 A

• High Noise Immunity Characteristic of CMOS Devices

• In Compliance with the Requirements Defined by JEDEC

Standard No. 7 A

• Chip Complexity: 328 FETs or 82 Equivalent Gates

• Improvements over HC595

♦ Improved Propagation Delays

♦ 50% Lower Quiescent Power

♦ Improved Input Noise and Latchup Immunity

• NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable

• These Devices are Pb−Free, Halogen Free and are RoHS Compliant

The MC74HC595ADR2G MC74HC595A consists of an 8−bit shift register and an 8−bit D−type latch with three−state parallel outputs. The shift register accepts serial data and provides a serial output. The shift register also provides parallel data to the 8−bit latch. The shift register and latch have independent clock inputs. This device also has an asynchronous reset for the shift register.

The MC74HC595ADR2G HC595A directly interfaces with the SPI serial data port on CMOS MPUs and MCUs.