S912XEP100W1MAG 微控制器 NXP

S912XEP100W1MAG

16位微控制器 - MCU 16-bit MCU, S12X core, 1MB Flash, 50MHz, -40/+125degC, Automotive Qualified, QFP 144

Introduction S912XEP100W1MAG

The MC9S12XE-Family of micro controllers is a further development of the S12XD-Family including new features for enhanced system integrity and greater functionality.

Features S912XEP100W1MAG

Features of the MC9S12XE-Family are listed here. Please see Table D-2.for memory options and Table D- 2. for the peripheral features that are available on the different family members.

• 16-Bit CPU12X

— Upward compatible with MC9S12 instruction set with the exception of five Fuzzy instructions

(MEM, WAV, WAVR, REV, REVW) which have been removed

— Enhanced indexed addressing

— Access to large data segments independent of PPAGE

• INT (interrupt module)

— Eight levels of nested interrupts

— Flexible assignment of interrupt sources to each interrupt level.

— External non-maskable high priority interrupt (XIRQ)

— Internal non-maskable high priority Memory Protection Unit interrupt

— Up to 24 pins on ports J, H and P configurable as rising or falling edge sensitive interrupts

Modes of Operation S912XEP100W1MAG

Memory map and bus interface modes:

• Normal and emulation operating modes

— Normal single-chip mode

— Normal expanded mode

— Emulation of single-chip mode

— Emulation of expanded mode

• Special Operating Modes

— Special single-chip mode with active background debug mode

— Special test mode (Freescale use only)