MIMXRT1052DVL6A 处理器 NXP

MIMXRT1052DVL6A

处理器 - 专门应用 i.MX RT1050 Commercial600Mhz

i.MX RT1050 introduction MIMXRT1052DVL6A

The i.MX RT1050 is a new processor family featuring NXP’s advanced implementation of the Arm Cortex®-M7 core, which operates at speeds up to 600 MHz to provide high CPU performance and best real-time response.

Features MIMXRT1052DVL6A

The i.MX RT1050 processors are based on Arm Cortex-M7 MPCore™ Platform, which has the following features:

• Supports single Arm Cortex-M7 MPCore with:

— 32 KB L1 Instruction Cache

— 32 KB L1 Data Cache

— Full featured Floating Point Unit (FPU) with support of the VFPv5 architecture

— Support the Armv7-M Thumb instruction set

• Integrated MPU, up to 16 individual protection regions

• Up to 512 KB I-TCM and D-TCM in total

• Frequency of 600 MHz

The i.MX RT1050 processors integrate advanced power management unit and controllers: MIMXRT1052DVL6A

• Full PMIC integration. On-chip DCDC and LDO

• Temperature sensor with programmable trip points

• GPC hardware power management controller

The i.MX RT1050 processors support the following system debug:

• Arm CoreSight debug and trace architecture

• Trace Port Interface Unit (TPIU) to support off-chip real-time trace

• Support for 5-pin (JTAG) and SWD debug interfaces selected by eFuse Security functions are enabled and accelerated by the following hardware:

• High Assurance Boot (HAB)

• Data Co-Processor (DCP):

— AES-128, ECB, and CBC mode

— SHA-1 and SHA-256

— CRC-32