S912XET256J2CAL 微控制器 NXP

S912XET256J2CAL

16位微控制器 - MCU W/16 BIT, 256K FLASH 16K

Introduction S912XET256J2CAL

The MC9S12XE-Family of micro controllers is a further development of the S12XD-Family including new features for enhanced system integrity and greater functionality. These new features include a Memory Protection Unit (MPU) and Error Correction Code (ECC) on the Flash memory together with enhanced EEPROM functionality (EEE), an enhanced XGATE, an Internally filtered, frequency modulated Phase Locked Loop (IPLL) and an enhanced ATD. The E-Family extends the S12X product range up to 1MB of Flash memory with increased I/O capability in the 208-pin version of the flagship MC9S12XE100.

Modes of Operation S912XET256J2CAL

Memory map and bus interface modes:

• Normal and emulation operating modes

— Normal single-chip mode

— Normal expanded mode

— Emulation of single-chip mode

— Emulation of expanded mode

• Special Operating Modes

— Special single-chip mode with active background debug mode

— Special test mode (Freescale use only)

Features S912XET256J2CAL

Features of the MC9S12XE-Family are listed here. Please see Table D-2.for memory options and Table D- 2. for the peripheral features that are available on the different family members.

• 16-Bit CPU12X

— Upward compatible with MC9S12 instruction set with the exception of five Fuzzy instructions

(MEM, WAV, WAVR, REV, REVW) which have been removed

— Enhanced indexed addressing

— Access to large data segments independent of PPAGE

• INT (interrupt module)

— Eight levels of nested interrupts

— Flexible assignment of interrupt sources to each interrupt level.

— External non-maskable high priority interrupt (XIRQ)

— Internal non-maskable high priority Memory Protection Unit interrupt