S9S12G48F1MLC 微控制器 NXP

S9S12G48F1MLC

16位微控制器 - MCU 16-bit MCU S12 core 48KB Flash 25MHz

S12 16-Bit Central Processor Unit (CPU) S9S12G48F1MLC

S12 CPU is a high-speed 16-bit processing unit:

• Full 16-bit data paths supports efficient arithmetic operation and high-speed math execution

• Includes many single-byte instructions. This allows much more efficient use of ROM space.

• Extensive set of indexed addressing capabilities, including:

— Using the stack pointer as an indexing register in all indexed operations

— Using the program counter as an indexing register in all but auto increment/decrement mode

— Accumulator offsets using A, B, or D accumulators

— Automatic index predecrement, preincrement, postdecrement, and postincrement (by –8 to +8)

Main External Oscillator (XOSCLCP) S9S12G48F1MLC

• Loop control Pierce oscillator using a 4 MHz to 16 MHz crystal

— Current gain control on amplitude output

— Signal with low harmonic distortion

— Low power

— Good noise immunity

— Eliminates need for external current limiting resistor

— Transconductance sized for optimum start-up margin for typical crystals

— Oscillator pins can be shared w/ GPIO functionality

Chip-Level Features S9S12G48F1MLC

On-chip modules available within the family include the following features:

• S12 CPU core

• Up to 240 Kbyte on-chip flash with ECC

• Up to 4 Kbyte EEPROM with ECC

• Up to 11 Kbyte on-chip SRAM

• Phase locked loop (IPLL) frequency multiplier with internal filter

• 4–16 MHz amplitude controlled Pierce oscillator

• 1 MHz internal RC oscillator

• Timer module (TIM) supporting up to eight channels that provide a range of 16-bit input capture,

output compare, counter, and pulse accumulator functions

• Pulse width modulation (PWM) module with up to eight x 8-bit channels