车载视频信号传送及切换

5-43 MHz DC-Balanced 24-Bit FPD-Link II Serializer and  Deserializer Chipset

Supports displays with 18-bit color depth
■ 5MHz to 43MHz pixel clock
■ Automotive grade product AEC-Q100 grade 2 qualified

■ 24:1 interface compression
■ Embedded clock with DC Balancing supports AC-coupled
data tran*ission
■ Capable to drive up to 10 meters shielded twisted-pair
cable
■ No reference clock required (deserializer)
■ Meets ISO 10605 *D - Greater than 8 kV HBM *D
structure
■ Hot plug support
■ EMI Reduction - Serializer accepts spread spectrum input;
data randomization and shuffling on serial link;
Deserializer provides Adjustable PTO (progressive turnon)
LVCMOS outputs
■ @Speed BIST (built-in self test) to validate LVDS
tran*ission path
■ Individual power-down controls for both Tran*itter and
Receiver
■ Power supply range 3.3V ± 10%
■ 48-pin TQFP package for Tran*itter and 64-pin TQFP
package for Receiver
■ Temperature range -40°C to +105°C
■ Backward compatible mode with DS90C241/DS90C124