S5PC100A80-LA40集多种功能于一身,可用于无线通信、GPS、摄像头、手机游戏、便携式多媒体播放器、移动电视、PDA等等.
S5PC100 采用了32位的ARMcortex A8精简指令集的一种处理器,并且是64/32位的内部总线结构,和*大833 MHz的运算速度。
这个处理器的视频解码能力很强大,并且省电。
主要表现有720p品质的录像和回放**30fps,
支持*实时的传送会议视频
支持MPEG(SP/ASP)/H.263(Profile3)/H.264(BP/MP/HP)编码和解码
支持电视PAL/NTSC制式输出,支持HDMI输出。
Features
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CortexA8 based CPU Subsystem with NEON
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32/32KB I/D Cache, 256KB L2 Cache
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667/800MHz (O/D) Operating Frequency at 1.2 V and TBD V respectively
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64-bit Multi-layer bus architecture
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Advanced power management for mobile applications
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ROM for secure booting and RAM for security function
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8-bit ITU 601/656 Camera Interface up to 8M pixel for scaled and 16M pixel for un-scaled resolution
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Multi Format CODEC provides encoding and decoding of MPEG-4/H.263/H.264up to 30fps@HD(720p) and decoding of MPEG-2/VC1/Divx/Xvid video up to 30fps@HD(720p)
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JPEG codec support up to 30Mpixels/s
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3D Graphics Acceleration with Programmable Shaderup to 10M triangles/s (Transform only)
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2D Graphics Acceleration with BitBlitand Rotation, up to 40Mpixels/s
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1/2/4/8 bpppalletized or 8/16/24bpp non-palletized Color-TFT support up to 2048x2048
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TV-out for NTSC and PAL mode and HDMI 1.2 interface support with PHY
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MIPI-HSI, MIPI-DSI and MIPI-CSI interface support
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1-channel AC-97 audio codec interface, 2-ch PCM serial audio interface, and 3-channel 24-bit I2Sinterface support (5.1ch support)
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2-channel S/PDIF interface support for di*al audio
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2-channel I2C interface (up to 400KHz) support including 1-channel for HDMI
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3-channel HS-SPI, up to 52Mbps
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4-channel UART including 4Mbps port for Bluetooth 2.0 and IrDA port for SIR/MIR/FIR
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On-chip U* 2.0 OTG supporting high speed (480Mbps, on-chip transceiver)
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On-chip U* 1.1 Host supporting full speed (12Mbps, on-chip transceiver)
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Asynchronous direct Modem Interface support including 16KB DPRAM
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3-channel SD/SDIO/HS-MMC interface support including CE-ATA
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CF version 3.0 interface support for HDD
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24-channel DMA controller
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Support 8x8 key matrix
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10-ch 12-bit multiplexed ADC
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2-ch CAN interface
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Configurable GPIOs
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Real time clock, PLL, timer with PWM and watch dog timer
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Memory Subsystem
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SRAM/ROM/*R/NAND Interface with x8 or x16 data bus
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MuxedOneNANDInterface with x16 data bus
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1-port Mobile DDR Interface with x32 data bus (up to 333Mbps/pin DDR)
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1-port DDR2 interface with x16 or x32 data bus (333Mbps/pin DDR)
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1-port LPDDR2 interface (up to 333Mbps/pin DDR)