8−Bit串行或
Parallel−Input/Serial−Output
移位寄存器与3−State
输出
High−Performance Silicon−Gate CMOS
特性 Features：
• Output Drive Capability: 15 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2.0 to 6.0 V
• Low Input Current: 1 A
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements Defined by JEDEC
Standard No. 7 A
• Chip Complexity: 526 FETs or 131.5 Equivalent Gates
• These Devices are Pb−Free, Halogen Free and are RoHS Compliant
