FEATURES • Single Power Supply Operation - Low voltage range: 2.7 V - 3.6 V • Memory Organization - Pm25LV010: 128K x 8 (1 Mbit) - Pm25LV020: 256K x 8 (2 Mbit) - Pm25LV040: 512K x 8 (4 Mbit) • Cost Effective Sector/Block Architecture - Uniform 4 Kbyte sectors with the bottom sector configurable as one 4 Kbyte or four 1 Kbyte smaller sectors - Uniform blocks architecture (sector group) - Four blocks with 32 Kbytes each (1 Mbit) - Four blocks with 64 Kbytes each (2 Mbit) - Eight blocks with 64 Kbytes each (4 Mbit) • Serial Peripheral Interface (SPI) Compatible - Supports SPI Modes 0 (0,0) and 3 (1,1) - Maximum 33 MHz clock rate for fast read - Maximum 33 MHz clock rate for read • Page Program (up to 256 Bytes) Operation - Typical 2 ms per page program • Sector, Block or Chip Erase Operation - Typical 40 ms sector, block or chip erase • Software Write Protection - The Block Protect (BP2, BP1, BP0) bits allow partial or entire memory to be configured as read-only • Hardware Write Protection - Protect and unprotect the device from write operation by Write Protect (WP#) Pin • Low Power Consumption - Typical 10 mA active read current - Typical 15 mA program/erase current • High Product Endurance - Guarantee 100,000 program/erase cycles per single sector - Minimum 20 years data retention • Industrial Standard Pin-out and Package - 8-pin 150mil SOIC - 8-pin 208mil SOIC for Pm25LV040 - 8-contact WSON - Optional lead-free (Pb-free) package
