串行存储IC*烧录器

· U* interface Device Support List

· Signals conflict protections

· Image download speed at 1Mbits/s to SPI flash

· No need to remove the SPI flash for development or repair

· No need to boot the system and therefore, no need of peripherals: processor, ATX Power Supply.

HARDWARE

· ISP connector: to control the SPI signals, supply the memory; control 4 different application signals for general purpose (like chipset Reset) and Vpp to speed up the update of some Serial Flash. The Vdd pin allows supplying the programmer via the application.

· Switch: to select the working mode: U* or Stand Alone

· Button: to start the automatic operations in stand Alone mode

· Card Flash connector: to connect the Card Flash memory used to store the reference code in Stand alone (in development)

CONTENTS

· U* cable

· 1 Programmer

· ISP cable

· CDROM with Software and specifications and user manual

Schematic Requirment for ISP

· South bridge chipset SPI pins must be isolated from the programmer(power off scenario) or in high impendence states during reset state(power on scenario)

· Schematic available upon request. please contact .cn for reference schematic

ACC*SORI*

· SF100 Programmer with its ISP cable

· SO Test Clip (if no connector on board)

· Flash Card to store the reference code when SF100 is used in Stand alone mode (no computer)

供应万用量产ISP在线烧录器

供应串行存储IC*烧录器