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PCI Express* (PCIe*)
— 64-bit address master support for systems
using more than 4 GB of physical memory
— Programmable host memory receive buffers
(256 bytes to 16 KB)
— Intelligent interrupt generation features to
enhance driver performance
— Descriptor ring management hardware for
transmit and receive software controlled reset
(resets everything except the configuration
space)
— Message Signaled Interrupts (MSI)
— Configurable receive and transmit data FIFO,
programmable in 1 KB increments
MAC
— Flow Control Support compliant with the
802.3X Specification
— VLAN support compliant with the 802.1Q
Specification
— MAC Address filters: perfect match unicast
— filters; multicast hash filtering, broadcast filter
— and promiscuous mode
— Statistics for RMOM
— MAC loopback
PHY
— Compliant with the 1 Gb/s IEEE 802.3 802.3u
802.3ab Specifications
— IEEE 802.3ab auto negotiation support
— Full duplex operation at 10/100/1000 Mb/s
— Half duplex at 10/100 Mb/s
— Auto MDI, MDI-X crossover at all speeds
High Performance
— TCP segmentation capability compatible with
Large Send offloading features
— Support up to 256 KB TCP segmentation (TSO
v2)
— Fragmented UDP checksum offload for packet
reassemble
— IPv4 and IPv6 checksum offload support
(receive, transmit, and large send)
— Split header support
— 40 KB packet buffer size
Low Power
— Magic Packet* wake-up enable with unique
MAC address
— ACPI register set and power down functionality
supporting D0 andD3 states
— Full wake up support (APM and ACPI 2.0)
— Smart power down at S0 no link and Sx no link
— LAN disable function
Technology
— 9 mm x 9 mm 64-pin QFN package with
Exposed Pad*
— Configurable LED operation for customization
of LED displays
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