大量长期现货原装 AFE58JD28ZAV

AFE58JD28ZAV 制造商: Texas Instruments

产品种类: 模拟前端 – AFE

类型: Ultrasound AFE

分辨率: 12 bit, 14 bit

采样比: 65 MS/s, 80 MS/s

通道数量: 16 Channel

接口类型: JESD

电源电压-最大: 3.6 V

电源电压-最小: 3.15 V

最小工作温度: - 40 C

最大工作温度: + 85 C

AFE58JD28ZAV 安装风格: SMD/SMT

封装  NFBGA-289

产品: Analog Front End  

商标: Texas Instruments  

产品类型: Analog Front End - AFE  

工厂包装数量: 126  

AFE58JD28ZAV描述

The AFE58JD28 device is a highly-integrated, analog front-end (AFE) solutions specifically designed for ultrasound systems where high performance, low power, and small size are required.

The AFE58JD28 is an integrated AFE optimized for medical ultrasound application. The device is realized through a multichip module (MCM) with two dies: one voltage-controlled amplifier (VCA) die and one analog-to-digital converter (ADC) die. The VCA die has 16 channels that interface with the 16 channels of the ADC die.

Each channel in the VCA die can be configured in one of two modes: time gain compensation (TGC) mode or continuous wave (CW) mode. In TGC mode, each channel includes a low-noise amplifier (LNA), a voltage-controlled attenuator (VCAT), a programmable gain amplifier (PGA), and a third-order, low-pass filter (LPF). The LNA is programmable in gains of 21 dB, 18 dB, or 15 dB. The LNA also supports active termination. The VCAT supports an attenuation range of 0 dB to 36 dB, with analog voltage control for the attenuation. The PGA provides gain options from 18 dB to 27 dB in steps of 3 dB. The LPF cutoff frequency can be set between 10 MHz and 30 MHz to support ultrasound applications with different frequencies. In CW mode, the output of the LNA goes to a low-power passive mixer with 16 selectable phase delays followed by a summing amplifier with a band-pass filter. Different phase delays can be applied to each analog input signal to perform an on-chip beamforming operation. A harmonic filter in the CW mixer suppresses the third and fifth harmonic to enhance the sensitivity of the CW Doppler measurement.

AFE58JD28ZAV The 16 channels of the ADC die can be configured to operate with a resolution of 14 bits or 12 bits. The ADC resolution can be traded off with conversion rate, and can operate at maximum speeds of 65 MSPS and 80 MSPS at 14-bit and 12-bit resolution, respectively. The ADC is designed to scale its power with sampling rate. The output interface of the ADC comes out through a low-voltage differential signaling (LVDS) that can easily interface with low-cost field-programmable gate arrays (FPGAs).

AFE58JD28ZAV特性

16-Channel AFE for Ultrasound Applications:

Optimized Signal Chains for TGC and CW Modes

Four Programmable TGC Profiles

Low-Noise Amplifier (LNA) With:

Programmable Gain: 21 dB, 18 dB, and 15 dB