GL3510-OSY10(QFN64)USB3.1分流USB集线器GL全系代理GL3510 Hub

深圳市华正源电子有限公司

型号:GL3510-OSY

封装:QFN64

包装:2600/个

台湾创惟GENESYS全系列

USB 3.1 Gen 1 Hub Controller

长期供应 量大从优

CHAPTER 1  GENERAL DESCRIPTION

Genesys GL3510-OSY is a 4-port, low-power, and configurable hub controller. It is compliant with the USB 3.1

specification. GL3510-OSY integrates Genesys Logic self-developed USB 3.1 Gen 1 Super Speed transmitter/receiver

physical layer (PHY) and USB 2.0 High-Speed PHY. It supports Super Speed, Hi-Speed, and Full-Speed USB

connections and is fully backward compatible to all USB 2.0 and USB 1.1 hosts. GL3510-OSY has built-in 5V to

3.3V and 5V to 1.2V regulators, which saves customers’ BOM cost, and eases for PCB design.

GL3510-OSY features the native fast-charging and complies with USB-IF battery charging specification rev1.2, it

could fast-charge Apple, Samsung Galaxy devices, and any device complaint with BC1.2/1.1. It also allows

portable devices to draw up to 1.5A from GL3510-OSY charging downstream ports (CDP 1 ) or dedicated charging port

(DCP 2 ). It can enable systems to fast charge handheld devices even during “Sleep” and “Power-off” modes.

All available packages for GL3510-OSY are listed as the following tables.

CHAPTER 2  FEATURES

~~Compliant with USB 3.1 Gen 1 Specification

----Upstream port supports SuperSpeed (SS), HighSpeed (HS) and FullSpeed (FS) traffic

----Downstream ports support SS, HS, FS, and LowSpeed (LS) traffic

----1 control pipe and 1 interrupt pipe

----Backward compatible to USB specification Revision 2.0/1.1

~~Featuring fast-charging on all downstream ports and upstream port

----Compliant with USB Battery Charging Revision v1.2, supporting CDP, DCP, and ACA-Dock

----Downstream ports can be turned from a Standard Downstream Port (SDP) into Charging Downstream

Port (CDP) or Dedicated Charging Port (DCP)

----Downstream devices can be charged while upstream VBUS is not present, which can be applied on wall

charger applications

----Upstream port is capable of charging and data communicating simultaneously for portable devices

supporting ACA-Dock or proprietary charging protocols

----Supporting Apple 1A/2.1A/2.4A and Samsung Galaxy devices fast-charging

~~On-chip 8-bit micro-processor

----RISC-like architecture

----USB optimized instruction set

----1 cycle instruction execution (maximum)

----Performance: 12 MIPS @ 12.5MHz (maximum)

----With 256-byte RAM, 20K-byte internal ROM, and 24K-byte SRAM

~~Single Transaction Translator (TT) architecture

~~Advanced power management and low power consumption

----Supporting USB 3.1 U0/U1/U2/U3 power management states

----Supporting USB Link Power Management (LPM) L0/L1/L2

----Supporting individual/gang mode over-current detection for all downstream ports

----Supporting low active power switche

~~Configurable settings by EEPROM

----Configurable charging port

----Supporting configuration and customized VID/PID by EEPROM

----Supporting compound-device (non-removable setting on downstream ports)

~~Flexible design

----Supporting Poly-fuse/Power-switch

----Automatic switching between self-powered and bus-powered modes

----Supporting electrical tuning for each specific port

----Allow downstream ports to connect up to 8 devices, 4 x USB3.1 non-removable devices with 4 x

USB2.0 non-removable devices or exposed ports

~~Low BOM cost

----Single external 25 MHz crystal / Oscillator clock input

----Built-in upstream port 1.5KΩ pull-up and downstream port 15KΩ pull-down resistors

----Built-in 5 to 3.3V and 5 to 1.2V regulator

~~Applications

----Standalone USB hub/Docking station

----USB wall charger