AVAGO 高速光耦 HCPL-0710-500E

HCPL-0710-500E

HCPL-0710-500E

HCPL-0710-500E

HCPL-0710-500E

Features

• +5 V CMOS compatibility

• 8 ns maximum pulse width distortion

• 20 ns maximum prop. delay skew

• High speed: 12 Mbd

• 40 ns maximum prop. delay

• 10 kV/μs minimum common mode rejection

• -40°C to 100°C temperature range

• Safety and regulatory approvals

UL Recognized

3750 V rms for 1 min. per UL 1577

5000 V rms for 1 min. per UL 1577 (for HCPL-7710

option 020)

CSA Component Acceptance Notice #5

IEC/EN/DIN EN 60747-5-2

– VIORM = 630 Vpeak for HCPL-7710 Option 060

– VIORM = 560 Vpeak for HCPL-0710 Option 060

Applications

• Digital fieldbus isolation: DeviceNet, SDS, Profibus

• AC plasma display panel level shifting

• Multiplexed data transmission

• Computer peripheral interface

• Microprocessor system interface

Description

Available in either an 8-pin DIP or SO-8 package style

respectively, the HCPL-7710 or HCPL-0710 optocouplers

utilize the latest CMOS IC technology to achieve outstanding performance with very low power consumption. The

HCPL-x710 require only two bypass capacitors for complete

CMOS compatibility.