集线器控制器-GL3523-S5-QFN-88

GL3523-S5 电子元器件 GENESYS/创惟科技 封装QFN-88 USB 3.1 Gen 1集线器控制器

DESCRIPTION
Genesys GL3523 is a 4-port, low-power, and configurable hub controller. It is compliant with the USB 3.1 specification. GL3523 integrates Genesys Logic self-developed USB 3.1 Gen 1 Super Speed transmitter/receiver physical layer (PHY) and USB 2.0 High-Speed PHY. It supports Super Speed, Hi-Speed, and Full-Speed USB connections and is fully backward compatible to all USB 2.0 and USB 1.1 hosts. GL3523 also implements multiple TT* (Note1) architecture providing dedicated TT* to each downstream (DS) port, which guarantees Full-Speed(FS) data passing bandwidth when multiple FS devices perform heavy loading operations. Furthermore, GL3523 has built-in 5V to 3.3V and 5V to 1.2V regulators, which saves customers’ BOM cost, and eases for PCB design.
GL3523 features the native fast-charging and complies with USB-IF battery charging specification rev1.2, it could fast-charge Apple, Samsung Galaxy devices, and any device complaint with BC1.2/1.1. It also allows portable devices to draw up to 1.5A from GL3523 charging downstream ports (CDP1) or dedicated charging port (DCP2). It can enable systems to fast charge handheld devices even during “Sleep” and “Power-off” modes.
With different part numbers, GL3523 also has USB Type-C function integrated (GL3523-S).

FEATURES
Compliant with USB 3.1 Gen 1 Specification
Upstream port supports SuperSpeed (SS), HighSpeed (HS) and FullSpeed (FS) traffic
Downstream ports support SS, HS, FS, and LowSpeed (LS) traffic
1 control pipe and 1 interrupt pipe
Backward compatible to USB specification Revision 2.0/1.1 .
Native USB Type-C support in GL3523-S series
- Compliant with USB Type-C Cable and Connection Specification Revision 1.0
Featuring USB Type-C functions
Detecting flip-able/reversible plugging
Discovering/configuring VBUS
Supporting USB Type-C Current modes，including USB Default, 1.5A@5V, 3A@5V
Configuring/Suppoting VCONN Power and having VCONN over-current protection
Billboard/USB-C bridge integrated
Featuring fast-charging on all downstream ports and upstream port
Compliant with USB Battery Charging Revision v1 2, supporting CDP, DCP, and ACA _Dock
Downstream ports can be turned from a Standard Downstream Port (SDP) into Charging Downstream
Port (CDP) or Dedicated Charging Port (DCP)
Downstream devices can be charged while upstream VBUS is not present, which can be applied on wall
charger applications
Upstream port is capable of charging and data communicating simultaneously for portable devices
supporting ACA Dock or proprietary charging protocols
Supporting Apple 1A/2. 1A/2.4A and Samsung Galaxy devices fast-charging
On-chip 8-bit micro-processor
RISC-like architecture
USB optimized instruction set
1 cycle instnuction execution (maximum)
Perfomance: 12 MIPS @ 12.5MHz (maximum)
With 256-byte RAM, 20K-byte internal ROM, and 24K-byte SRAM
32KB for signal region firmware code size
Multiple Transaction Translator (TT) architecture
Providing dedicated TT control logics for each downstream port
-Superior performance when multiple FS devices operate concurrently
Integrated USB transceiver
Improving output drivers with slew-rate control for EMI reduction
Intemnal power-fail detection for ESD recovery
Advanced power management and low power consumption
- Supporting USB 3.1 U0/U1/U2/U3 power management states
-Supporting USB Link Power Management (LPM) L0/L1/L2
-Supporting individual/gang mode over-current detection for all downstream ports
Supporting both low/high-enabled power switches
Patented Smart Power Management
Configurable sttings by firmware in SPI flash
Configurable charging port
Configurable 4/3/2 downstream ports, downstream port can be disabled/enabled by each specific port
for USB3.1/USB2.0
Configurable Upstream and Downstream Ports in GL3523-S
Supporting multiple upstream ports in GL3523-S packages
Supporting full in-system programming firmware upgrade by SPI-flash and configuration by EEPROM
Supporting compound-device (non-removable setting on downstream ports)
-Supporting customization VID/PID
Flexible design
Supporting Poly-fuse/Power-switch
Automatic switching between self- powered and bus-powered modes
Supporting electrical tuning for each specific port
Supporting programmable breathing LED
Supporting register setting by firmware
Supporting vendor command and SMBUS
Allow downstream ports to connect up to 8 devices, 4 x USB3.1 non-removable devices with 4 x
USB2.0 non-removable devices or exposed ports
Low BOM cost
Single extermal 25 MHz crystal 1 Oscillator clock input
Built-in upstream port 1 5KS pul-up and downstream port 15K9 pull-down resistors
Built-in5 to 3.3V and 5 to 1.2V regulator
Miscellaneous
HID integrated
Dual bank firmware recovery supported
Different package types available for various applications
Applications
Standalone USB hub/Docking station
Tablet/UltrabookNB
Motherboard
Monitor built-in hub, GPIOs can be programmed as I2C interface to easily update scalar firmware
through USB interface
TV built- in hub
Compound device, such as hub-reader application
USB wall charger
Other consumer electronics
Customized applications
Dynamically disable/enable ports
GPIO signaling of ambient light sensor or rotation/position sensor