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74HC4514D 解码器/信号分离器 SOP-24 74HC系列逻辑IC 74HC4514
The 74HC4514D,653 is a 4-to-16 line Decoder or Demultiplexer with input latches is a high-speed Si-gate CMOS devices and are pin compatible with 4514 of the 4000B series. This is specified in compliance with JEDEC standard no-7A. This is 4-to-16 line decoders/demultiplexer having four binary weighted address inputs (A0 to A3) with latches, a latch enable input (LE) and an active low enable input (E). The 16 outputs (Q0 to Q15) are mutually exclusive active high. When LE is high, the selected output is determined by the data on An. When LE goes low, the last data present at An are stored in the latches and the outputs remain stable. When E is low, the selected output, determined by the contents of the latch and is high. At E high all outputs are low. The enable input (E) does not affect the state of the latch.Non-inverting outputsStandard output capabilityMSI ICC category
NXP/恩智浦
74HC4514
逻辑IC
标准
24
SOP-24
2017
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