S9S12ZVL32F0CLC 微控制器MCU NXP

S9S12ZVL32F0CLC

16位微控制器 - MCU MagniV 16-bit MCU, S12Z core, 32KB Flash, 25MHz, -40/+85degC, Automotive Qualified, QFP 32

Introduction

The MC9S12ZVL-Family is an automotive 16-bit microcontroller family using the 180nm NVM + UHV technology that offers the capability to integrate 40V analog components. This family reuses many features from the existing S12 portfolio. The particular differentiating features of this family are the enhanced S12Z core and the integration of “high-voltage” analog modules, including the voltage regulator (VREG) and a Local Interconnect Network (LIN) physical layer.

Features S9S12ZVL32F0CLC

This section describes the key features of the MC9S12ZVL-Family.

Chip-Level Features S9S12ZVL32F0CLC

On-chip modules available within the family include the following features:

• S12Z CPU core

• 128, 96, 64, 32, 16 or 8 KB on-chip flash with ECC

• 2048, 1024, 128 byte EEPROM with ECC

• 8192, 4096, 1024 or 512 byte on-chip SRAM with ECC

• Phase locked loop (IPLL) frequency multiplier with internal filter

• 1 MHz internal RC oscillator with +/-1.3% accuracy over rated temperature range

• 4-20 MHz amplitude controlled pierce oscillator

S12Z Central Processor Unit (CPU) S9S12ZVL32F0CLC

The S12Z CPU is a revolutionary high-speed core, with code size and execution efficiencies over the S12X CPU. The S12Z CPU also provides a linear memory map eliminating the inconvenience and performance impact of page swapping.

• Harvard Architecture - parallel data and code access

• 3 stage pipeline

• 32-Bit wide instruction and databus

• 32-Bit ALU

• 24-bit addressing (16 MByte linear address space)