供应TMS320F28335PGFA 原装现货

供应原装现货TMS320F28335PGFA
• High-Performance Static CMOS Technology – Up to 150 MHz (6.67-ns Cycle Time) – 1.9-V/1.8-V Core, 3.3-V I/O Design • High-Performance 32-Bit CPU (TMS320C28x) – IEEE 754 Single-Precision Floating-Point Unit (FPU) (F2833x Only) – 16 × 16 and 32 × 32 MAC Operations – 16 × 16 Dual MAC – Harvard Bus Architecture – Fast Interrupt Response and Processing – Unified Memory Programming Model – Code-Efficient (in C/C++ and Assembly) • Six-Channel DMA Controller (for ADC, McBSP, ePWM, XINTF, and SARAM) • 16-Bit or 32-Bit External Interface (XINTF) – More Than 2M × 16 Address Reach • On-Chip Memory – F28335, F28333, F28235: 256K × 16 Flash, 34K × 16 SARAM – F28334, F28234: 128K × 16 Flash, 34K × 16 SARAM – F28332, F28232: 64K × 16 Flash, 26K × 16 SARAM – 1K × 16 OTP ROM • Boot ROM (8K × 16) – With Software Boot Modes (Through SCI, SPI, CAN, I2C, McBSP, XINTF, and Parallel I/O) – Standard Math Tables • Clock and System Control – On-Chip Oscillator – Watchdog Timer Module • GPIO0 to GPIO63 Pins Can Be Connected to One of the Eight External Core Interrupts • Peripheral Interrupt Expansion (PIE) Block That Supports All 58 Peripheral Interrupts • 128-Bit Security Key/Lock – Protects Flash/OTP/RAM Blocks – Prevents Firmware Reverse Engineering
Single/Simultaneous Conversions – Internal or External Reference • Up to 88 Individually Programmable, Multiplexed GPIO Pins With Input Filtering • JTAG Boundary Scan Support – IEEE Standard 1149.1-1990 Standard Test Access Port and Boundary Scan Architecture • Advanced Emulation Features – Analysis and Breakpoint Functions – Real-Time Debug Using Hardware • Development Support Includes – ANSI C/C++ Compiler/Assembler/Linker – Code Composer Studio™ IDE – DSP/BIOS™ and SYS/BIOS – Digital Motor Control and Digital Power Software Libraries
TMS320F28335PGFA 

TMS320F28335PGFA 

TMS320F28335PGFA 
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