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• Organization x8
Memory cell array 2112 × 64K × 8
Register 2112× 8
Page size 2112 bytes
Block size (128K + 4K) bytes
• Modes
Read, Reset, Auto Page Program, Auto Block Erase, Status Read, Page Copy,
ECC Status Read
• Mode control
Serial input/output
Command control
• Number of valid blocks
Min 1004 blocks
Max 1024 blocks
• Power supply
V CC = 2.7V to 3.6V
• Access time
Cell array to register 40 μs typ.
Serial Read Cycle 25 ns min (CL=50pF)
• Program/Erase time
Auto Page Program 330 μs/page typ.
Auto Block Erase 3.5 ms/block typ.
• Operating current
Read (25 ns cycle) 30 mA max.
Program (avg.) 30 mA max
Erase (avg.) 30 mA max
Standby 50 μA max
• Package
P-VFBGA67-0608-0.80-001 (Weight: TBD g typ.)
• 8bit ECC for each 528Bytes is implemented on a chip.
1G
TSOP48
BENAND (Built-in ECC SLCNAND)
0-40
2.7-3.6