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74HC4514 GENERAL DESCRIPTION
The 74HC4514/HCT4514 are high-speed Si-gate CMOS devices and are pin compatible with “4514” of the “4000B” series. They are specified in compliance with JEDEC standard no. 7A. The 74HC4514/HCT4514 are 4-to-16 line decoders/demultiplexers having four binary weighted address inputs (A 0 to A 3 ), with latches, a latch enable input (LE), and an active LOW enable input (E). The 16 outputs (Q 0 to Q 15 ) are mutually exclusive active HIGH. When LE is HIGH, the selected output is determined by the data on An . When LE goes LOW, the last data present at A n are stored in the latches and the outputs remain stable. When E is LOW, the selected output, determined by the contents of the latch, is HIGH. At E HIGH, all outputs are LOW. The enable input (E) does not affect the state of the latch. When the “4514” is used as a demultiplexer, E is the data input and A 0 to A 3 are the address inputs.
74HC4514 FEATURES
• Non-inverting outputs
• Output capability: standard
• I CC category: MSI
NXP/恩智浦
74HC4514D
SOP24
原装